Field of the Invention
This invention relates generally to a digital-to-analog converter (hereinafter referred to as "DAC"), and in particular to a floating-point-type DAC which can implement a digital-to-analog conversion of an input data with less distortion irrespective of the magnitude thereof.
There has been proposed a floating-point-type DAC which includes a mantissa-part DAC and an exponent-part DAC. Although such a floating-point-type DAC has a high conversion accuracy and can convert an input data of a small magnitude into an analog form with less distortion, it must be supplied with an input data in the form of a floating point number.
In order to overcome the above deficiencies, the inventors proposed in co-pending U.S. patent application Ser. No. 781,767 a DAC which can deal with an input data in the form of an ordinary fixed-point binary number. As shown in FIG. 1, the DAC comprises a digital shifter 1 for shifting bits I.sub.0 to I.sub.15 of an input data D.sub.IN to extract therefrom N consecutive bits to be supplied to a mantissa-part DAC 2. A shift number detector 3 decodes a predetermined number of higher-order bits of the input data D.sub.IN to produce a signal representative of the number of bits to be shifted by the digital shifter 1 and supplies the produced signal to the digital shifter 1 and an exponent-part DAC 4. In the case where the input data D.sub.IN is represented in two's complement, the digital shifter 1 extracts the N consecutive bits in accordance with the signal fed from the shift number detector 3 in such a manner that the greater the absolute value of the input data D.sub.IN is, the higher the order of the N consecutive bits extracted from the input data D.sub.IN is. Also, the exponent-part DAC 4 produces an exponent part of the output signal V.sub.OUT in accordance with the signal fed from the shift number detector 3.
With the DAC shown in FIG. 1, if the mantissa-part DAC 2 has a higher resolution (for example, a resolution of about 12 bits), the minimum step of variation of the output signal V.sub.OUT becomes smaller, so that a total harmonic distortion of the output signal V.sub.OUT of higher signal levels desirably becomes smaller. However, even though the mantissa-part DAC 2 is manufactured so as to have a 12-bit resolution, the actual accuracy thereof is 10 bits at the best. In such a case, although the low accuracy does not much affect on the higher level signals, the total harmonic distortion of the output signal of lower signal levels becomes worse.
On the other hand, it is not difficult to manufacture a mantissa-part DAC having an accuracy of about 10 bits, so that it is possible to improve the total harmonic distortion of the output signal of lower signal levels by arranging the mantissa-part DAC to have a resolution of 10 bits. In this case, however, the total harmonic distortion of the output signal of higher signal levels will be deteriorated since the minimum step of variation of the higher level output signal becomes large.
Thus, with the aforesaid floating-point-type DAC, the total harmonic distortion of the output signal is deteriorated in one of the higher and lower signal level ranges depending on the selection of the accuracy of a mantissa-part DAC thereof.